AOB416 100v n-channel mosfet sdmos t m general description product summary v ds i d (at v gs =10v) 45a r ds(on) (at v gs =10v) < 36m ? r ds(on) (at v gs = 7v) < 43m ? 100% uis tested 100% r g tested symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-stat e steady-stat e r jc maximum junction-to-ambient a c/w units 11 max 14 typ pulsed drain current c continuous drain current w 150 t a =25c power dissipation b p d avalanche energy l=0.1mh c t c =25c 6.2 5.0 a i dsm a drain-source voltage 100 the AOB416 is fabricated with sdmos tm trench technology that combines excellent r ds(on) with low gate charge.the result is outstanding efficiency with controlled switching behavior. this universal technology is well suited for pwm, load switching and general purpose applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 100v v 25 gate-source voltage mj avalanche current c 39 a 28 120 continuous drain current 75 t c =100c 2.5 w 1.6 t c =25c i d 45 t c =100c 32 t a =70c power dissipation a t a =25c p dsm t a =70c c thermal characteristics parameter r ja maximum junction-to-ambient a d 40 50 c/w junction and storage temperature range -55 to 175 maximum junction-to-case 0.7 1 c/w g d s to-263 d 2 pa k d g s g s top view bottom view rev 0: april 2009 www.aosmd.com page 1 of 7
AOB416 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 10 t j =55c 50 i gss 100 na v gs(th) gate threshold voltage 2.8 3.4 4 v i d(on) 130 a 30 36 t j =125c 54 65 34 43 m ? ? q g 16 20 24 nc q gs 5.5 7 8.5 nc q gd 3.5 6.3 9 nc t d(on) 10 ns t r 7ns t d(off) 15 ns t f 7ns t rr 13 19 25 ns q rr 50 70 90 nc components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time drain-source breakdown voltage on state drain current i d =250 a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a reverse transfer capacitance i f =20a, di/dt=500a/ s v gs =0v, v ds =50v, f=1mhz switching parameters electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss a v ds =v gs i d =250 a v ds =0v, v gs = 25v zero gate voltage drain current gate-body leakage current forward transconductance diode forward voltage r ds(on) static drain-source on-resistance m ? i s =1a,v gs =0v v ds =5v, i d =20a v gs =7v, i d =15a v gs =10v, v ds =50v, r l =2.5 ? , r gen =3 ? gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =10v, v ds =50v, i d =20a gate source charge gate drain charge body diode reverse recovery charge i f =20a, di/dt=500a/ s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime a . the value of r j is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150c. the value in any given application depends on the user's specific board design, and the maximum temperature of 175c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c. repetitive rating, pulse width limited by junction temperature t j(max) =175c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300ms pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =175c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. rev 0: april 2009 www.aosmd.com page 2 of 7
AOB416 typical electrical and thermal characteristic s 40 0 20 40 60 3456789 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 20 25 30 35 40 45 50 0 5 10 15 20 25 30 35 40 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m ? ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 25c 125c 20 30 40 50 60 70 678910 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m ? ) 25c 125c v ds =5v v gs =7v v gs =10v i d =20a 25c 125c 0 10 20 30 40 50 60 012345 v ds (volts) fig 1: on-region characteristics (note e) i d (a) 6v 7v 8v 10v v gs =5v 0.8 1 1.2 1.4 1.6 1.8 2 2.2 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =7v i d =15a v gs =10v i d =20a rev 0: april 2009 www.aosmd.com page 3 of 7
AOB416 typical electrical and thermal characteristic s 0 2 4 6 8 10 0 5 10 15 20 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 200 400 600 800 1000 1200 1400 1600 0 20406080100 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss c oss c rss v ds =50v i d =20a 100 1000 10000 0.00001 0.001 0.1 10 pulse width (s) figure 11: single pulse power rating junction-to- case (note f) power (w) 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 v ds (volts) i d (amps) figure 10: maximum forward biased safe operating area (note f) 10 pulse width (s) figure 12: normalized maximum transient thermal impedance (note f) z jc normalized transient thermal resistance single pulse d=t on /t t j,pk =t c +p dm .z jc .r jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r jc =1c/w rev 0: april 2009 www.aosmd.com page 4 of 7
AOB416 typical electrical and thermal characteristic s 0 30 60 90 120 150 180 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note f) power dissipation (w) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note f) current rating i d (a) t a =25c t a =150c t a =100c t a =125c 10 100 0.000001 0.00001 0.0001 time in avalanche, t a (s) figure 9: single pulse avalanche capability (note c) i ar (a) peak avalanche current t a =25c t a =150c t a =100c t a =125c 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal impedance (note h) z ja normalized transient thermal resistance 0 10 20 30 40 50 0.01 0.1 1 10 100 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) power (w) d=t on /t t j,pk =t a +p dm .z ja .r ja r ja =45c/w in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse single pulse t a =25c t on t p d rev 0: february 2009 www.aosmd.com page 5 of 7
AOB416 typical electrical and thermal characteristic s 0 30 60 90 120 150 0 5 10 15 20 25 30 i s (a) figure 13: diode reverse recovery charge and peak current vs. conduction current q rr (nc) 0 5 10 15 20 25 30 i rm (a) di/dt=800a/ s 125oc 125oc 25oc 25oc q rr i rm 0 30 60 90 120 150 0 200 400 600 800 1000 di/dt (a/ s) figure 15: diode reverse recovery charge and peak current vs. di/dt q rr (nc) 0 5 10 15 20 25 30 i rm (a) 125oc 125oc 25oc 25oc i s =20a q rr i rm 0 4 8 12 16 20 24 0 5 10 15 20 25 30 i s (a) figure 14: diode reverse recovery time and softness factor vs. conduction current t rr (ns) 0 0.5 1 1.5 2 2.5 3 s di/dt=800a/ s 125oc 125oc 25oc 25oc t rr s 0 5 10 15 20 25 30 0 200 400 600 800 1000 di/dt (a/ s) figure 16: diode reverse recovery time and softness factor vs. di/dt t rr (ns) 0 0.5 1 1.5 2 2.5 s 125oc 25oc 25oc 125o i s =20a t rr s rev 0: april 2009 www.aosmd.com page 6 of 7
AOB416 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms tt r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 0: april 2009 www.aosmd.com page 7 of 7
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